Many integrated circuits require delay circuits in certain signal paths. For instance, it may be important to delay the arrival of a signal until a particular circuit has prepared itself for the signal's arrival. A signal may be also be delayed to ensure that the circuit meets certain timing specifications.
Conventional delay circuits produces a fixed amount of time delay, which may not be the optimal amount of delay under various conditions. In situtations where different amounts of delay would be optimal in different conditions, conventional delay circuits are designed either for a time delay amount that is a compromise value for all conditions, or a time delay that is best for one condition and acceptable for other conditions.
It is therefore an object of the present invention to provide a delay circuit that creates different time delays under different conditions.